LibreLane

A powerful and versatile ASIC infrastructure library

LibreLane is a powerful and versatile infrastructure library that enables the construction of digital implementation flows for application specific integrated circuits (ASICs) based on open-source and commercial electronic design automation (EDA) tools. It includes two reference flows (Classic and Chip) that are built entirely using open-source EDA tools.

The successor to the massively popular OpenLane, LibreLane is:

  • Simple to use: Configure your entire ASIC implementation flow using one file.
  • Free and open source: With a complementary set of open-source process design kits (PDKs), design and implement your chip without signing a single document. Freely modify both the infrastructure, underlying tools, and PDK to fit your needs – you're in control. Not a vendor.
  • Flexible and extensible: Create custom flows, both by simple modifications to the default flows in the configuration file, or by writing Python scripts or plugins to implement advanced functionality.
  • Hermetic: Rewind and explore alternative configurations without losing data – LibreLane captures explicit snapshots of the configuration and state of your design at every step.
  • Reproducible and traceable: LibreLane comes packaged with a verified environment of free EDA utilities with a simple goal in mind: same tools, same flow, same configuration; same result. Capture your modifications and engineering change orders (ECOs) as automated steps, and your flow is your documentation.

You can try LibreLane right in your browser:

Try LibreLane in your Browser
LibreLane Repository
LibreLane Documentation

Our Principles


Community

LibreLane is developed by the community, for the community. Join us over at FOSSi Chat!

FOSSi Chat

Innovation

LibreLane allows you to configure and implement chips using just one configuration file – and once it works, it keeps working.

FOSSi Foundation projects

Guardianship

LibreLane is under the umbrella of the FOSSi Foundation, a not-for-profit organisation.

The FOSSi Foundation manifesto

Contribution

If you would like to contribute to LibreLane, find the repository here.

Repository



PDK Support

sky130

gf180mcu

ihp-sg13

Support for additional open-source or proprietary PDKs can be added by creating a LibreLane PDK configuration. Read more about this process in the LibreLane documentation under Process Design Kits and Universal Flow PDK Configuration Variables. A good example for a LibreLane PDK configuration can be found in the IHP Open PDK.

LibreLane Plugins

LibreLane also supports the ability to freely extend or modify flows using Python scripts and utilities. You would like your plugin to be featured? Please write to librelane@fossi-foundation.org.


Testimonials

You would like to be featured in our testimonials? Please write to librelane@fossi-foundation.org.

Chip design is hard. LibreLane makes it easy.

LibreLane enables educators, researchers, hobbyists, and industry professionals alike to create manufacturable chips.

Install LibreLane now for Windows, macOS, or Linux.